DS90CR218A lvds equivalent, +3.3v rising edge data strobe lvds.
1
* 12 to 85 MHz Shift Clock Support
* 50% Duty Cycle on Receiver Output Clock
* Low Power Consumption
* ±1V Common-mode Range (Around +1.2V)
* Narrow.
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PRODUCTION D.
The DS90CR218A receiver deserializes three input LVDS data streams into 21 bits of CMOS/TTL output data. When operating at the maximum input clock rate of 85 Mhz, the LVDS data is received at 595 Mbps per data channel for a total data throughput of 1.
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TAGS
+3.3V